This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-327178, filed Nov. 17, 1999, the entire contents of which are incorporated herein by reference.
The present invention relates to a computer system and a data transfer control method. In particular, the present invention relates to an improved computer system and an improved data transfer control method so that data required to transmit a bus transaction can be transferred accurately and speedily.
In recent years, there has been developed a variety of personal computers (hereinafter, referred to as a notebook type PC) that can be easily portable and operable by batteries. Some notebook type PCs are configured so that these PCs can be attached to an expansion unit in order to ensure their functional expansion as required. In order to ensure that a resource of an expansion unit can be efficiently used from a notebook type PC, it is essential to connect a bus of the notebook type PC to a bus in the expansion unit. By this bus connection, a device on the bus in the expansion unit can be handled in the same way as the device in the notebook type PC.
In many personal computers, a PCI (Peripheral Component Interconnect) bus is used. Therefore, it is general that bus connection between the notebook type PC and the expansion unit is made by providing docking connectors having a large number of pins corresponding to the number of signal lines included in the PCI bus on the notebook type PC side and the expansion unit side, respectively, and then, physically connecting both PCI buses via the docking connectors.
However, in this configuration, a large area is required for mounting a docking connector, which is disadvantageous in achieving small sized and thinner notebook type PC. Further, connector mount positions of the notebook type PC side and the expansion unit side must be aligned with another, restriction will apply to a physical cabinet structure in carrying out new product development.
Recently, there has been proposed by the Applicant a technique in which a PCI-PCI bridge for making connection between a PCI bus on the notebook type PC side and a PCI bus on the expansion unit side is composed of two controllers, i.e., first and second controllers that are physically different from each other, and transmission of information between these controllers is performed through serial transmission (Japanese Patent Application No. 11-183919 and U.S. patent application Ser. No. (not assigned yet) filed on Jun. 28, 2000). In this case, the two controllers, i.e., the first and second controllers are disposed separately on the notebook type PC side and expansion unit side. Data required to transmit a bus transaction from the PCI bus on the notebook type PC side to the PCI bus on the expansion unit side is transmitted to the second controller via a serial transmission path such as a cable after being converted from parallel data into serial data at the first controller. In the second controller, conversion from serial data into parallel data is performed, and a bus transaction is executed on the PCI bus on the expansion unit side. In this manner, the notebook type PC and the expansion unit can be connected to each other via a thin cable with its small number of signal lines.
However, in the case where a single PCI-PCI bridge is composed of two controllers, i.e., the first and second controllers that are physically different from each other, it is required to ensure data transfer between these two controllers in order to maintain reliability in system operation. Further, a data transfer speed between these two controllers greatly influences throughput of the entire system. Hence, implementation of a new flow control for transmitting data required to transmit a bus transaction accurately and speedily between two controllers is required.
Many of the data transfers in the fields of computer or communication are performed by employing a handshake. If a receiving party detects an error, it transmits NACK (Negative ACK) to a transmitting party. If the transmitting party receives NACK, it performs a re-transmission processing. If the receiving party receives data correctly, it transmits ACK (Acknowledgment) to the transmitting party. If the transmitting party receives ACK, it goes to the next data transmission processing. However, in such system, although its implementation is easy, it is difficult to obtain a sufficient communication speed be aware of the nature of the handshake process.
Accordingly, it is an object of the present invention to provide a computer system and a data transfer control method in which a new flow control is implemented such that data required to transmit a bus transaction between buses can be transmitted accurately and speedily between two controllers, thereby ensuring sufficient throughput and improvement of operation.
According to the present invention, there is provided a computer system for transferring data required to transmit a bus transaction between first and second controllers, the computer system comprising: data transmitting means for assigning consecutive IDs to a plurality of data targeted for transmission, respectively, thereby sequentially transmitting a plurality of these data from a transmitting controller to a receiving controller without waiting for return of a response from the receiving party; response transmitting means for, each time data is received correctly, transmitting the response to which the same ID as that of the received data has been assigned, from the receiving controller to the transmitting controller; and means for managing whether or not the response is returned from the receiving controller for each transmitted data, and, when a re-transmission request is received from the receiving controller, for re-transmitting data for which the response is not received from the receiving controller in order of IDS.
In this computer system, a consecutive ID is assigned to data at the transmitting controller, and is transmitted to the receiving controller. In this case, there is no need to wait for a response from the receiving controller every data transmission, and a plurality of data are transmitted to the receiving controller sequentially irrespective of the response. The receiving controller basically returns a response to the transmitting party every correct data reception. In this case, an ID corresponding to the received data is assigned to such response. This is because return of the response can be executed asynchronously with data transmission from the transmitting party. Hence, the transmitting party can perform next data transmission without waiting for a response from the receiving party.
Further, the transmitting party can recognize whether or not the response is returned from the receiving controller by each transmitted data by employing an ID assigned to the response. Thus, as in a general handshake, whether or not the data is correctly received can be known for individual data. In addition, the transmitting party can determine which data item is the last the receiving party has received. Thus, for example, the case where the receiving party cannot receive data due to a buffer overflow on the receiving buffer, data that is not received can be re-transmitted. Hence, improvement in communication speed can be made compatible with improvement in reliability.
Hence, a mechanism of the above flow control is applied to two physically different controllers that configure a bus bridge, thereby making it possible to transfer data required to transmit a bus transaction speedily and accurately. Serial connection between a host device and an expansion unit can be achieved while a bus bridge maintains its operational reliability and performance.
At the transmitting party, even after the data is transmitted, the transmitted data may be managed as data waiting for a response until the corresponding response has been received.
In addition, the computer system according to the present invention further comprises error recovery means for, when an error occurs during data transfer between the first and second controllers, executing transmission and reception of a predetermined bit pattern between the first and second controllers, thereby reestablishing synchronization of a communication path between the first and second controllers, notifying to the transmitting controller an ID of the data from which transmission is to be restarted and which is next to the data which was correctly received last, and thereafter, recovering the first and second controllers in a normal operation state, wherein, in the case where these controllers are recovered in such normal operation state, the data transmitting means restarts transmission processing from the data of which ID was notified from the receiving controller.
In this manner, during error detection, as during initialization, it becomes possible to ensure recovery from a variety of errors by restarting from reestablishment of synchronization of the communication path. Further, during error recovery processing, an ID of the received data is notified from the receiving party to the transmitting party in order to eliminate logical discontinuity between the controllers. In this manner, after error recovery, the data transmitting means on the transmitting party can restart transmission processing correctly from the next data of the received data notified from the receiving controller. The receiving party does not necessitate to formally transmit acknowledgement to the transmitting party.
As described previously, a sequential ID is assigned to a response as well as the data, and thus, error detection can be easily performed by checking continuity of the ID of the response from the receiving party.
In addition, the computer system of the present invention is directed to a computer system for exchanging data required to transmit a bus transaction between the first and second controllers, the computer system comprising data transmitting means for assigning consecutive IDs to data waiting for transmission respectively, thereby consecutively transmitting a plurality of predetermined data items from a transmitting controller to a receiving controller without waiting for a return of a response from the receiving party; response transmitting means for transmitting a response to which the same ID as that of the received data has been assigned, from the receiving controller to the transmitting controller; and means for managing whether or not a response is returned from the receiving controller, and causing the data transmitting means to repeatedly execute consecutive transmission processing in units of the plurality of data items including data waiting for the response so as to repeatedly transmit data waiting for the response.
In this computer system, consecutive transmission processing is repeatedly executed in units of a plurality of data items including data waiting for a return of a response as well as data waiting for transmission. Because of this, the receiving party may receive data at its own timing. Even if a re-transmission request is not made, the receiving party can receive data at an arbitrary timing. Hence, although throughput is somewhat reduced, a control for re-transmission processing is eliminated, and simplified control can be achieved. Of course, data for which a response is received is excluded from a transmission target, and instead, even if data waiting for transmission is present, such data may be transmitted.
Additional objects and advantages of the present invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the present invention.
The objects and advantages of the present invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.